MIT researchers present the first silicon chip that can decode any code independent of its structure

A new silicon chip can decode any error correction code by using a new algorithm known as Guessing Random Additive Noise Decoding (GRAND). Credits: Image: Jose-Luis Olivares, MIT, chip courtesy of researchers

All data that is transmitted over the Internet, from paragraphs in an email to 3D images in a virtual reality environment, is susceptible to noise, such as electromagnetic interference from a microwave or a Bluetooth device. The data is encoded so that when it reaches its destination, a decoding program can reverse the effects of noise and recover the original data.

A group of researchers from MIT, Boston University and Maynooth University have created the world’s first silicon chip that can decode any code with the utmost precision, regardless of its structure. The team used a universal decoding algorithm called Guessing Random Additive Noise Decoding (GRAND) to create this chip. GRAND offers improved efficiency by reducing the need for several computationally complex decoders. This new chip has several augmented and virtual reality applications, games, 5G networks and connected devices that need to process a lot of data with minimal latency.

The noise or energy that interrupts the signal is often generated by other electronic devices and affects the encoded data as it travels over a network. When the data is encoded and the noise that has influenced it to reach its destination, the decoding algorithm usually consults its codebook and guesses the stored information based on the hash structure.

On the other hand, GRAND works by predicting the noise that influenced the message and then deducing the original information from the noise pattern. GRAND creates a series of noise sequences in the order in which they are most likely to occur. It then rests the received data and checks if the generated code word is in a codebook.

Although the noise appears to be random, it has a probabilistic structure that allows the algorithm to guess what it is.

GREAT architecture

The GRAND chip has a three-tier structure. The first stage begins with the simplest and most feasible solutions and finally moves towards longer and more complicated noise patterns in the later stages. Each stage works independently, increasing system performance and conserving energy.

The device can also move effortlessly between two different codebooks. It has two random access static memory chips, one of which can break code words while the other loads a new codebook and immediately goes into decoding.

Because GRAND only uses codebooks for verification, it can be used not only with historical codes, but also with codes that have not yet been published. Therefore, GRAND may eliminate the requirement of such strict standards in the future.

The GRAND chip capable of decoding any moderate redundancy code up to 128 bits in length with just one microsecond of latency was tested. According to experts, the GRAND chip could even lead to an increase in innovation in the world of coding.

In the future, the team plans to use a re-equipped version of the GRAND chip to address the problem of soft detection, in which the data received is less accurate. They also aim to evaluate the potential of GRAND to break longer and more complicated codes and modify the structure of the silicon chip to increase its energy efficiency.


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